QCA based Novel Reversible Reconfigurable Ripple Carry Adder with Ripple Borrow Subtractor in Electro-Spin Technology

An important arithmetic component of “Arithmetic and Logic Unit” or ALU is reconfigured in this paper, known as “Full-Adder-Subtractor”, where an advance low-power, high-speed nano technology “QCA” with electro-spin criterion used reversibility the advancement multilayer 3D circuitry. In modern digital world, selected nano-sized effective alternative widely “CMOS Technology” because all limitations, mainly limitation due to presence high power dissipation at time device-density increment a “CMOS” based integrated circuit, can be optimized by also supports reversible logic platform less complexity. This primarily presents two novel 3-layered “Adder-Subtractor” designs using collaboration inverter gates, modified 3-input Feynman-Gate MG (Majority Gate) very cell-complexity, area-occupation, delay energy-dissipation output-strength, temperature-tolerance accuracy. A clear parametric investigation on presented are shown clearly paper through comparative manner some previous published related structures. Additionally, another parametric-experiment multibit “Full-Adder-Subtractor” circuitry working phenomenon “Ripple Carry Adder” (RCA) subtractor (“ripple borrow subtractor” RBS) proposed work proper way combination RCA subtraction operation converts into hybrid form, which more compare other advanced adders parametric-optimization field.